Katarzyna Petru
AMD has presented a new series of server processors EPYC 8005, known by the codename Sorano. The chips have been designed for telecommunications infrastructure and edge environments, where low latency, high predictability of operation, and energy efficiency are crucial. The most powerful models offer up to 84 Zen 5 cores, which represents a significant leap compared to the previous generation Siena.
84 Zen 5 cores and up to 225 W TDP
Sorano expands the EPYC family based on the Zen 5 architecture. The processors offer up to 84 cores with a maximum power consumption of 225 W. However, AMD suggests that, as in previous generations, there will also be variants with lower TDP, potentially below 100 W, which is important in edge installations with limited cooling capabilities. The architecture features a full 512-bit data path for vector instructions, which is one of the key elements of the changes in Zen 5. In vRAN (virtualized Radio Access Network) environments, stable bandwidth and low latency are primarily what matters, rather than the maximum clock speed of a single core.
Is 5G and LDPC the key to advantage?
AMD emphasises the improvement in performance regarding the decoding of LDPC (Low-Density Parity Check), which is the foundation of 5G network operation. Better efficiency in this area could free up computational resources for processing L1 and L2 layers, which in practice allows for the running of more network functions on a single server. It is in such scenarios that Sorano is expected to compete with solutions from Intel, which is developing the Xeon 6700E and Xeon 6 SoC lines. The 6700E model can scale up to 144 efficiency cores, focusing on density and lower power consumption at the expense of more advanced instruction features.
Additionally, Intel is integrating accelerators for vRAN and support for AI and multimedia processing in its chips. Importantly, companies such as Ericsson and Nokia have been using Intel platforms in commercial deployments for years, making it difficult for AMD to quickly capture the market.
Last major Zen 5 before "Venice"?
Sorano may be the last significant representative of the server line Zen 5 before the launch of the next generation EPYC codenamed Venice, scheduled for 2026. However, the number of cores alone rarely dictates purchases in the telecommunications sector; total cost of implementation, compatibility, and long-term relationships with suppliers matter.
The new EPYC 8005 "Sorano" represents a strong move by AMD towards 5G infrastructure and edge computing. With 84 Zen 5 cores and an emphasis on LDPC performance, the company aims to genuinely compete with Intel in the telecommunications sector. The question is whether this will be enough to convince operators to change long-standing technology partnerships.
sources: techradar
